Hotline: 678-408-1354

Design Verification Engineer

As a global semiconductor company operating in 35 countries, Texas Instruments (TI) is first and foremost a reflection of its people. From the TIer who unveiled the first working integrated circuit in 1958 to the more than 30,000 TIers around the world today who design, manufacture and sell analog and embedded processing chips, we are problem-solvers collaborating to change the world through technology. Put your talent to work with us – change the world, love your job!

About the job:

In this role, your responsibilities will include the following.

  • Develop detailed Verification plans using specifications to cover all the digital functionality/features of a mixed-signal chip for our next generation automotive applications
  • Develop SystemVerilog chip-level testscases based on the verification plan
  • Simulation, Testcase debug and Verification closure for the digital functionality of Mixed-signal chips, at chip-level
  • Develop SystemVerilog based behavioral models for the analog blocks and integrate them in the chip-level verification environment.
  • RTL and Gate level regression, with timings for all the corners
  • Run coverage and meet the defined coverage goals (both Functional and Code coverage)
  • Work closely with design and systems teams to review/close spec gaps and design bugs, as they arise.

Basic Qualifications:

  • Bachelors degree in Electrical Engineering or related field
  • 5+ years of related experience
  • Strong hands on working experience in digital verification for Mixed-signal chips
  • Strong programming skills using SystemVerilog in verification
  • Good in verification approach, flow, concepts.
  • SystemVerilog and UVM/OVM knowledge
  • Experience in writing an exhaustive verification plan from the specs
  • Experience in writing chip-level testcases in SystemVerilog
  • Experience in metric based Verification closure using Code and Functional coverage
  • Experience with chip-level verification
  • Experience in random/constrained random verification
  • Experience with Cadence simulation and debug tools
  • Good in debugging skills
  • Ability to work independently and self driven/motivated person
  • Strong written and verbal communication skills
  • Good team player

Preferred Qualifications:

  • Understanding of various analog blocks of a mixed signal chip and its interaction with digtial
  • Develop/modify self-checking testbenches using advanced verification methodologies in SystemVerilog
  • Experience in verifying the logic in a processor based design
  • Experience in HW/FW co-simulation
  • Experience with UART, SPI, I2C communication protocols
  • Mixed-signal AMS experience using the Cadence-based solution (irun+spectre or irun+ultrasim, etc.)
  • Understanding of the full digital flow from RTL, synthesis, place-and-route, timing closure, extraction, SDF ..etc.
  • System-level experience in understanding and defining chip-to-chip interaction, board layout and component effects, cable models

To be considered for this position, please apply to this requisition.

Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to protected characteristics, including race, color, religion, sex, national origin, disability, veteran status, sexual orientation, gender identity, or age.

Share this job

Contact Us

Eltas EnterPrises Inc.
3978 Windgrove Crossing
Suite 200A
Suwanee, Georgia
30024, USA
contact@eltasjobs.com