Verification Engineer

Job Overview:

This department develops various mixed signal ASICs for IoT, automotive, and audio applications. We are looking for a motivated Verification Engineer to take on the responsibilities of executing all digital verification duties of a mixed signal IC development, including:

• Communicating with designers to obtain a deep understanding of circuit functionality
• Writing and executing test plans and test cases to expose defects and achieve a high level of coverage
• Collaborating with several other design, verification, emulation, validation and software engineers

Minimum Qualifications:

Candidates are expected to have experience with:

• Candidates must have a minimum of 5 years IC design verification experience.
• Verilog and SystemVerilog
• ASIC or FPGA verification
• RTL and gate level simulation experience using NCSIM or VCS
• Linting and Clock Domain Crossing experience using Spyglass or HAL
• Testbench automation scripting experience using Perl, Python, Awk or Shell
• Unix or Linux operating systems
• Assertion based verification with SystemVerilog assertions
• OVM or UVM verification methodologies

Preferred Qualifications:

Preferred qualifications in addition to minimum qualifications include:

• Low power verification with UPF or CPF
• Power analysis with PT-PX or PowerArtist
• Formal verification with Jasper
• Mixed signal verification using AMS
• Developing functional coverage properties

Education :

• Required: Bachelor’s, Electrical Engineering
• Preferred: Master’s or equivalent experience

Required education:

• Bachelor’s